Electrical systems often include semiconductor devices with very demanding power requirements (e.g. providing for high current transients with stable voltage over a wide frequency range). A power regulation circuit located on a printed circuit board (PCB) typically generates the voltage used to drive components of an IC. The power regulation circuit observes the regulated output voltage and adjusts the amount of current supplied to keep the voltage constant. The generated voltage is delivered from the regulator to the components by means of a power distribution network (PDN). A PDN includes not only the output ports of a power regulation circuit, but also power distribution lines on the printed circuit board (PCB), additional components mounted on the PCB, the package of the semiconductor IC, and power distribution lines of the IC.
PDNs are configured to accommodate current demands of integrated circuit components and respond to transient changes in these demands as quickly as possible. When the current draw in a device changes, the power regulation circuit may not be able to respond to that change instantaneously. For example, most voltage regulators adjust the output voltage on the order of milliseconds to microseconds. They are effective at maintaining output voltage for events at all frequencies from DC to a few hundred kilohertz (depending on the regulator). For all transient events that occur at frequencies above this range, there is a time lag before the voltage regulator can respond to the new level of demand. The PDN should be configured to accommodate for this lag. The voltage fluctuations, referred to herein as ripple, can affect timing of the circuit because a perturbed supply voltage modifies the delay of components such as logic gates or interconnects. If the modified delays are not accounted for, the design may not perform as intended.
The power consumed by a digital device varies over time and may occur at all frequencies of operation. Low frequency variance of current is usually the result of devices or large portions of devices being enabled or disabled. Similarly, high frequency variance of current often results from individual switching events of components of the IC. These switching events occur on the scale of the clock frequency as well as the first few harmonics of the clock frequency. In addition to ripple resulting from component switching, non-linear electrical characteristics of the components create additional fluctuations in voltage. These effects were generally ignored in older technologies because of relative slow chip speed and low integration density. However, as speed and density of circuits increase, the unintended effects caused by the parasitic electrical characteristics of components have become significant. Among other effects, inductance of various portions of the PDN, in combination with capacitance of the PDN, can resonate when perturbed.
PDN design for programmable ICs is particularly difficult because transient currents may vary widely depending on the design used to configure the programmable IC. Since programmable ICs can implement an almost infinite number of applications at undetermined frequencies and in multiple clock domains, it can be very complicated to predict transient current demands.
One or more embodiments of the present invention may address one or more of the above issues.